25 research outputs found

    Evolution of Transistor Circuits

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    Der Entwurf von analogen Schaltungen ist ein Bereich der Elektronikentwicklung, der dem Entwickler ein hohes Maß an Wissen und KreativitĂ€t beim Lösen von Problemen abverlangt. Bis heute gibt es nur rudimentĂ€re analytische Lösungen um die Bauteile von Schaltungen zu dimensionieren. Motiviert durch diese Herausforderungen, konzentriert sich diese Arbeit auf die automatische Synthese analoger Schaltungen mit Hilfe von EvolutionĂ€ren Algorithmen. Als analoges Substrat wird ein FPTA benutzt, das ein Feld von konfigurierbaren Transistoren zur VerfĂŒgung stellt. Der Einsatz von echter Hardware bietet zwei Vorteile: erstens können entstehende Schaltungen schneller getestet werden als mit einem Simulator und zweitens funktionieren die gefundenen Schaltungen garantiert auf einem echten Chip. Softwareseitig eignen sich EvolutionĂ€re Algorithmen besonders gut fĂŒr die Synthese analoger Schaltungen, da sie keinerlei Vorwissen ĂŒber das Optimierungsproblem benötigen. In dieser Arbeit werden neue genetische Operatoren entwickelt, die das VerstĂ€ndnis von auf dem FPTA evolutionierten Schaltungen erleichtern und außerdem Lösungen finden sollen, die auch außerhalb des Substrates funktionieren. Dies ist mit der Hoffnung verbunden, möglicherweise neue und ungewöhnliche Schaltungsprinzipien zu entdecken. Weiterhin wird ein mehrzieliger Optimierungsalgorithmus implementiert und verfeinert, um die Vielzahl von Variablen berĂŒcksichtigen zu können, die fĂŒr die gleichzeitige Optimierung von Topologie und Bauteiledimensionierung notwendig sind. Die vorgeschlagenen genetischen Operatoren, sowie die mehrzielige Optimierung werden fĂŒr die Evolution von logischen Gattern, Komparatoren, Oszillatoren und OperationsverstĂ€rkern eingesetzt. Der Ressourcenverbrauch der durch Evolution gefundenen Schaltungen wird damit vermindert und es ist möglich in einigen FĂ€llen einen ĂŒbersichtlichen Schaltplan zu erstellen. Ein modulares System fĂŒr die Evolution von Schaltungen auf konfigurierbaren Substraten wurde entwickelt. Es wird gezeigt, dass mit diesem System FPTA-Architekturen modelliert und direkt fĂŒr Evolutionsexperimente verwendet werden können

    Embedded Social Insect-Inspired Intelligence Networks for System-level Runtime Management

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    Large-scale distributed computing architectures such as, e.g. systems on chip or many-core devices, offer advantages over monolithic or centralised single-core systems in terms of speed, power/thermal performance and fault tolerance. However, these are not implicit properties of such systems and runtime management at software or hardware level is required to unlock these features. Biological systems naturally present such properties and are also adaptive and scalable. To consider how these can be similarly achieved in hardware may be beneficial. We present Social Insect behaviours as a suitable model for enabling autonomous runtime management (RTM) in many-core architectures. The emergent properties sought to establish are self-organisation of task mapping and systemlevel fault tolerance. For example, large social insect colonies accomplish a wide range of tasks to build and maintain the colony. Many thousands of individuals, each possessing relatively little intelligence, contribute without any centralised control. Hence, it would seem that social insects have evolved a scalable approach to task allocation, load balancing and robustness that can be applied to large many-core computing systems. Based on this, a self-optimising and adaptive, yet fundamentally scalable, design approach for many-core systems based on the emergent behaviours of social-insect colonies are developed. Experiments capture decision-making processes of each colony member to exhibit such high-level behaviours and embed these decision engines within the routers of the many-core system

    Social-Insect-Inspired Adaptive Task Allocation for Many-Core Systems

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    Large social insect colonies require a wide range of important tasks to be undertaken to build and maintain the colony. Fortunately, in most nests there are many thousands of workers available to offer their assistance to ensure the expansion and survival of the colony. However, there is a crucial equilibrium between the number of workers performing each task that must not only be maintained but must also continuously adapt to sudden changes in environment and colony need. What is most fascinating is that social insects can sustain this balance without any centralised control and with colony members that have relatively little intelligence when considered on their own. Due to this simplicity and evident scalability it would seem that social insects have evolved an interesting scalable approach to task allocation that could be applied to very large many-core systems. To investigate this we have explored biological models of task allocation in ant colonies and applied this to a 36-core Network on Chip. This paper not only shows that effective decentralised task allocation is achieved, but also that such a scheme can adapt to faults and alter its behaviour to meet soft real-time constraints. Therefore, it is established that social insect inspired intelligence models offer a suitable metaphor and development direction for tackling the challenges introduced by dark silicon and in-field faults in a decentralised and adaptive fashion

    Emergent properties of bio-inspired hardware

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    In this case, the emergent property sought to establish is system- level fault tolerance, the inspiration from biology are social insects (ant colonies), and the hardware system is a many-core computing architecture where application tasks and data need to be allocated transferred and organised. The model of processing elements com- municating amongst each other via a network on chip (NoC) provides a conceptual link with many scalable biological models. Based on this, a self-optimising and adaptive, yet fundamentally scalable, design approach for many-core systems based on the emer- gent behaviours of social-insect colonies are developed. Experiments aim to capture the relevant decision processes made by each member of the colony to exhibit such high-level behaviours and embed these decision engines within the routers of the many-core system. Results with the bespoke 128-core Centurion platform suggest that there is potential for the social insect model as a distributed, embedded intelligence within a many-core system and with the relevant knobs and monitors, such as clock frequency and temperature, to close the loop for emergent autonomous adaptation and fault tolerance

    Assessing the potential of surface-immobilized molecular logic machines for integration with solid state technology

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    Molecular computation with DNA has great potential for low power, highly parallel information processing in a biological or biochemical context. However, significant challenges remain for the field of DNA computation. New technology is needed to allow multiplexed label-free readout and to enable regulation of molecular state without addition of new DNA strands. These capabilities could be provided by hybrid bioelectronic systems in which biomolecular computing is integrated with conventional electronics through immobilization of DNA machines on the surface of electronic circuitry. Here we present a quantitative experimental analysis of a surface-immobilized OR gate made from DNA and driven by strand displacement. The purpose of our work is to examine the performance of a simple representative surface-immobilized DNA logic machine, to provide valuable information for future work on hybrid bioelectronic systems involving DNA devices. We used a quartz crystal microbalance to examine a DNA monolayer containing approximately 5 × 10^{11} gates cm^{−2}, with an inter-gate separation of approximately 14 nm, and we found that the ensemble of gates took approximately 6 min to switch. The gates could be switched repeatedly, but the switching efficiency was significantly degraded on the second and subsequent cycles when the binding site for the input was near to the surface. Otherwise, the switching efficiency could be 80% or better, and the power dissipated by the ensemble of gates during switching was approximately 0.1 nW cm^{−2}, which is orders of magnitude less than the power dissipated during switching of an equivalent array of transistors. We propose an architecture for hybrid DNA-electronic systems in which information can be stored and processed, either in series or in parallel, by a combination of molecular machines and conventional electronics. In this architecture, information can flow freely and in both directions between the solution-phase and the underlying electronics via surface-immobilized DNA machines that provide the interface between the molecular and electronic domains

    Evolving Carbon Nanotube Reservoir Computers

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    Reservoir Computing in Materio : An Evaluation of Configuration through Evolution

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    Recent work has shown that computational substrates made from carbon nanotube/polymer mixtures can form trainable Reservoir Computers. This new reservoir computing platform uses computer based evolutionary algorithms to optimise a set of electrical control signals to induce reservoir properties within the substrate. In the training process, evolution decides the value of analogue control signals (voltages) and the location of inputs and outputs on the substrate that improve the performance of the subsequently trained reservoir readout. Here, we evaluate the performance of evolutionary search compared to randomly assigned electrical configurations. The substrate is trained and evaluated on time-series prediction using the Santa Fe Laser generated competition data (dataset A). In addition to the main investigation, we introduce two new features closely linked to the traditional reservoir computing architecture, adding an evolvable input-weighting mechanism and a reservoir time-scaling parameter. The experimental results show evolved configurations across all four test substrates consistently produce reservoirs with greater performance than randomly configured reservoirs. The results also show that applying both input-weighting and timescaling simultaneously can provide additional tuning to the task, improving performance. For one material, the evolved reservoir is shown to outperform – for this task – all other hardwarebased reservoir computers found in the literature. The same material also outperforms a simple evolved simulated Echo State Network of the same size. The performance of this material is reported to be both consistent after long time-periods and after reconfiguration to other tasks

    High-Sigma Performance Analysis using Multi-Objective Evolutionary Algorithms

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    Semiconductor devices have rapidly improved in performance and function density over the past 25 years enabled by the continuous shrinking of technology feature sizes. Fabricating transistors that small, even with advanced processes, results in structural irregularities at the atomic scale, which affect device characteristics in a random manner. To simulate performance of circuits comprising a large number of devices using statistical models and ensuring low failure rates, performance outliers are required to be investigated. Standard Monte Carlo analysis will quickly become intractable because of the large number of circuit simulations required. Cases where the number of samples exceeds are known as “high-sigma problems”. This work proposes a highsigma sampling methodology based on multi-objective optimisation using evolutionary algorithms. A D-type Flip Flop is presented as a case study and it is shown that higher sigma outliers can be reached using a similar number of SPICE evaluations as Monte Carlo analysis

    Operating Beyond FPGA Tool Limitations : Nervous Systems for Embedded Runtime Management

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    Fabrication issues throttle VLSI designs with pes- simistic design constraints and speed-grade device binning nec- essary to avoid failure of devices. We propose that a on chip monitoring system (a Nervous System) can reduce this margin by automatically sensing and reacting to failures and environmental changes at runtime. We demonstrate that pessimistic margins in the FPGA tools allow our test circuit to be overclocked by twice the maximum design tool frequency and run at 50 °C above its maximum operating temperature without error. The Configurable Intelligence Array is introduced as a low-overhead intelligence platform and used for a prototype neural circuit that can close the loop between a timing-fault detector and a programmable Phase Locked Loop (PLL) oscillator

    The Sensor Organism

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    Large-scale, distributed sensor networks are the projected weapon of choice for future pervasive computing applications such as, for example, envi- ronment monitoring, surveillance, (big) data mining and patient monitoring. However, state-of-the-art approaches face major challenges: specialized sen- sors are expensive and require careful calibration. Hardware sensors operating in uncertain, harsh environments eventually suffer from stress, ageing and phys- ical damage, which leads to unforeseen effects that can render the device and the data recorded useless. Highly-tuned data processing algorithms are often not scalable and are not robust against faulty sensors delivering wrong data. Gener- ally, systems can only adapt, if at all, in some predefined limited ways and are not capable of autonomously “inventing” new ways of adapting to unexpected changes in their internal and external environment
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